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CD4503BC Hex Non-Inverting 3-STATE Buffer
October 1987 Revised January 1999
CD4503BC Hex Non-Inverting 3-STATE Buffer
General Description
The CD4503BC is a hex non-inverting 3-STATE buffer with high output current sink and source capability. 3-STATE outputs make it useful in bus-oriented applications. Two separate disable inputs are provided. Buffers 1 through 4 are controlled by the disable 4 input. Buffers 5 and 6 are controlled by the disable 2 input. A high level on either disable input will cause those gates on its control line to go into a high impedance state.
Features
s Wide supply voltage range: s 3-STATE outputs s Symmetrical turn on/turn off delays s Symmetrical output rise and fall times s Pin-for-pin replacement for MM80C97 and MC14503 3.0 VDC to 18 VDC
Ordering Code:
Order Number CD4503BCM CD4503BCSJ CD4503BCN Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC and SOP
Schematic Diagram
Truth Table
In 0 1 X Top View
X = Don't Care
Disable Input 0 0 1
Out 0 1 3-STATE
(c) 1999 Fairchild Semiconductor Corporation
DS005989.prf
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CD4503BC
Absolute Maximum Ratings(Note 1)
(Note 2) Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering, 10 seconds) 260C 700 mW 500 mW -0.5V to +18V -0.5V to +0.5V -65C to +150C
Recommended Operating Conditions (Note 2)
Supply Voltage (VDD) Operating Temperature Range (TA) +3V to +15V -40C to +85C
Note 1: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The tables of "Recommended Operating Conditions" and "Electrical Characteristics" provide conditions for actual device operation. Note 2: VSS = 0V unless otherwise specified.
DC Electrical Characteristics (Note 2)
Symbol IDD Parameter Quiescent Device Current VDD = 5V, VIN = VDD or VSS VDD = 10V, VIN = VDD or VSS VDD = 15V, VIN = VDD or VSS VOL LOW Level Output Voltage VIN = VDD or 0 VDD = 5V VDD = 10V VDD = 15V VOH HIGH Level Output Voltage VIN = V DD or 0 VDD = 5V VDD = 10V VDD = 15V VIL LOW Level Input Voltage VDD = 5V, VO = 4.5V or 0.5V VDD = 10V, VO = 9.0V or 1.0V VDD = 15V, VO = 13.5V or 1.5V VIH HIGH Level Input Voltage VDD = 5V, VO = 0.5V or 4.5V VDD = 10V, VO = 1.0V or 9.0V VDD = 15V, VO = 1.5V or 13.5V IOL LOW Level Output Current VDD = 4.5V, VOL = 0.4V VDD = 5.0V, VOL = 0.4V VDD = 10V, V OL = 0.5V VDD = 15V, VOL = 1.5V IOH HIGH Level Output Current ITL IIN 3-STATE Leakage Current Input Current VDD = 5V, VOH = 4.6V VDD = 10V, VOH = 9.5V VDD = 15V, VOH = 13.5V VDD = 15V VDD = 15V 2.30 2.5 6.5 16.50 -1.04 -2.60 -7.2 0.3 0.3 1.95 2.10 5.45 13.80 -0.88 -2.2 -6.0 2.65 2.75 7.0 25.00 -1.76 -4.50 -17.6 10-4 10-5 0.3 0.3 1.60 1.75 4.45 11.30 -0.7 -1.8 -4.8 1.0 1.0 mA mA mA mA mA mA mA A A 11.0 11.0 8.25 11.0 V 7.0 7.0 5.5 7.0 V 3.5 3.5 2.75 3.5 V 4.0 6.75 4.0 4.0 V 3.0 4.50 3.0 3.0 V 4.95 9.95 14.95 1.5 4.95 9.95 14.95 2.25 1.5 4.95 9.95 14.95 1.5 V V V V 0.05 0.05 0.05 0 0 0 0.05 0.05 0.05 0.05 0.05 0.05 V V V 16 16 120 A 8 8 60 A Conditions -40C Min Max 4 Min +25C Typ Max 4 +85C Min Max 30 Units A
Note 3: IOH and IOL are tested one output at a time.
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CD4503BC
AC Electrical Characteristics
Symbol tPHL, tPLH Parameter Propagation Delay Time
(Note 4)
Conditions Min Typ 75 35 25 80 40 35 95 40 35 45 23 18 45 23 18 Max 100 40 30 125 90 70 175 80 70 80 40 35 80 40 35 Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
TA = 25C, CL = 50 pF, RL = 200 k, Input tr = tf = 20 ns, unless otherwise specified VDD = 5V VDD = 10V VDD = 15V tPLZ, tPHZ Propagation Delay Time, Logical Level to HIGH Impedance State tPZL, tPZH Propagation Delay Time, High Impedance State to Logical Level tTLH Output Rise Time VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V tTHL Output Fall Time VDD = 5V VDD = 10V VDD = 15V
Note 4: AC Parameters are guaranteed by DC correlated testing.
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CD4503BC
AC Test Circuits and Switching Time Waveforms
tPHL , tPLH CMOS to CMOS
tPHZ and tPZH
tPLZ and tPZL
tPHZ
tPLZ
tPZH
tPZL
Note: Delays measured with input tr, tf 20 ns.
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CD4503BC
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D
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CD4503BC Hex Non-Inverting 3-STATE Buffer
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.

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